A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. including part of, one, or several dies) of a substrate (e.g. a silicon wafer). The pattern is typically transferred via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the radiation beam through a pattern in a given direction (the “scanning”-direction) while synchronously scanning the substrate in a direction that is parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.
The target portion or die on the substrate typically contains product structures (for example, microelectronic devices) and a scribe lane surrounding the product structures. The scribe lane provides a sawing groove to be used during the separation of individual dies from the substrate. During the manufacturing process of the product structures, multiple marker structures are placed in the scribe lane to enable process verification, alignment and alignment verification.
Typically, devices on substrates are manufactured by a sequence of lithographic processing steps in which the devices are formed from a plurality of overlaying layers, each having an individual pattern. Between one layer and the next layer that overlays the previous one, the individual patterns of the one layer and the next layer must be aligned. A measure for the alignment is obtained by an overlay metrology tool which utilizes marker structures in the scribe lane. The overlay metrology tool basically determines a position of a marker structure which has been formed in the one layer and a second position of a second marker structure which has been formed in the next layer overlaying the one layer. One example for determining overlay is the box-in-box overlay measurement technique.
When using the aforementioned scanner techniques for exposing each target portion individually (and repeatedly across the substrate), the so-called zero layer (i.e., a base layer) of each target portion must be aligned with respect to its adjacent target portions. To measure this “die-to-die” alignment which is often referred to as stitching overlay (or stitching), the pattern for each target portion comprises stitching overlay mark structures which overlay with complementary stitching overlay mark structures from the adjacent target portions. Again, the overlay of stitching overlay mark structures and a complementary stitching overlay mark structure can be measured by the overlay metrology tool.
Overlay errors of product structures may originate from at least one of a plurality of error sources, which can not be distinguished by the measurement.
Such overlay error sources include an overlay error of a previous exposure tool, an overlay error of a current exposure tool, a matching error between the overlay errors of the previous exposure tool and of the current exposure tool, a process induced overlay error, and an APC thread induced overlay error (APC: Automatic Process Control).
The overlay error of a previous exposure tool relates to an overlay error that is caused by a previous lithographic apparatus that created a layer previous to the next layer created by the current lithographic apparatus.
The overlay error of a current exposure tool relates to an overlay error made by the current lithographic apparatus.
The matching error relates to mismatch between the previous exposure tool and the current exposure tool.
The process induced overlay error relates to processing steps in between lithographic exposure steps. Such processing steps include annealing, deposition, chemical-mechanical polishing, or other processing steps that may have various unpredictable effects on pattern layers placed on the substrate and thus cause overlay related errors.
The APC thread induced overlay error relates to errors originating from automatic process control (APC). An APC tool is introduced in a fab (i.e., the fabrication facility) and is designed to determine the overlay drift on one lot (or batch) of substrates and to correct for the overlay drift on a next lot. For optimum performance one should predict the drift per tool-set (i.e., the actual lithographic apparatus and other tools used) per product and per layer. This optimum situation is attainable if the fab would produce a single product without tool maintenance. In reality, customers may combine the information of multiple tool and or products into a single thread, due to a need to collect enough data for trend analysis. The drawback of this method is that only an average drift for the single thread can be corrected for.
For the most critical layers where the overlay error must be minimal for device portions with minimal feature sizes such as a width of a control gate in a MOSFET, some of these error sources should be eliminated. Because of this, currently a single exposure tool (lithographic apparatus) is selected for the most critical layers as both the “previous” and the “current” exposure tool for the successive exposure steps. Although beneficial for reduction of overlay error, this approach may create many logistics problems in a fab since the distribution of lots over the lithographic tools in the fab during the manufacturing process becomes strongly limited.